The present invention relates to signal processing systems, in general, and more particularly to a processing system including a bus control module operative to support simultaneous data transfers between specified pairs of system modules coupled to a ring bus in accordance with concurrent execution of multiple programs of data transfer instructions.
Modern signal processing systems are comprised of a plurality of system modules which may have different performance levels as well as different sizes. The term "module" refers to a hardware combination that performs a significant function in the processing system. A signal processing system generally includes modules of the following classes:
(1) modules which facilitate input or output of data into the system;
(2) modules which are used for data retention and their associated access controls;
(3) processing modules which can be grouped in the same class regardless of the processing domain or manner in which the processing is achieved; and
(4) modules which provide a protocol for and control the data flow and exchange of information among the other modules.
Typically, a signal processing system comprises different combinations of the above classes of system modules. In order to satisfy signal processing requirements for a given application, a system configuration of the system modules is chosen which is best suited for the given application. Accordingly, a highly reconfigurable system architecture will allow for a great deal of flexibility.
The class (4) system module is considered essential to achieving the desired reconfigurable modular system architecture. System modules of this class may be referred to as bus control modules because they provide the control for high speed data transfers between all the other modules over a data bus. Modern multiple processor signal processing systems may at times have total processing capabilities large enough to exceed the capability of a data bus with a fixed transfer rate. Therefore, modular bus bandwidth as supported by a bus control module is fundamental to realizing a balanced multi-processing system architecture. An embodiment of a bus control module suitable for this purpose is described herebelow.